LT4356-2_15 [Linear Systems]
Surge Stopper;
| 型号： | LT4356-2_15 |
| 厂家： | 
Linear Systems |
| 描述： | Surge Stopper |
| 文件： | 总26页 (文件大小：241K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT4356-1/LT4356-2
Surge Stopper
FEATURES
DESCRIPTION
TheLT®4356surgestopperprotectsloadsfromhighvoltage
transients. It regulates the output during an overvoltage
event, such as load dump in automobiles, by controlling
the gate of an external N-channel MOSFET. The output is
limited to a safe value thereby allowing the loads to con-
tinue functioning. The LT4356 also monitors the voltage
n
Stops High Voltage Surges
n
Adjustable Output Clamp Voltage
n
Overcurrent Protection
n
Wide Operation Range: 4V to 80V
n
Reverse Input Protection to –60V
n
Low 7μA Shutdown Current, LT4356-1
n
Adjustable Fault Timer
Controls N-channel MOSFET
drop between the V and SNS pins to protect against
CC
n
overcurrent faults. An internal amplifier limits the current
sense voltage to 50mV. In either fault condition, a timer
is started inversely proportional to MOSFET stress. If the
timer expires, the FLT pin pulls low to warn of an impend-
ing power down. If the condition persists, the MOSFET is
turned off. After a cool down period, the GATE pin pulls
up turning on the MOSFET again.
n
Shutdown Pin Withstands –60V to 100V
Fault Output Indication
Guaranteed Operation to 125°C
n
n
n
Auxiliary Amplifier for Level Detection Comparator or
Linear Regulator Controller
n
Available in (4mm × 3mm) 12-Pin DFN,
10-Pin MSOP or 16-Pin SO Packages
The auxiliary amplifier may be used as a voltage detection
comparator or as a linear regulator controller driving an
external PNP pass transistor.
APPLICATIONS
n
Back-to-back FETs can be used in lieu of a Schottky diode
for reverse input protection, reducing voltage drop and
powerloss. Ashutdownpinreducesthequiescentcurrent
to less than 7μA for the LT4356-1 during shutdown. The
LT4356-2 differs from the LT4356-1 during shutdown by
reducing the quiescent current to 60μA and keeping alive
the auxiliary amplifier for uses such as an undervoltage
lockout or always-on regulator.
Automotive/Avionic Surge Protection
n
Hot Swap/Live Insertion
n
High Side Switch for Battery Powered Systems
Intrinsic Safety Applications
n
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
4A, 12V Overvoltage Output Regulator
Overvoltage Protector Regulates Output at
27V During Transient
10mΩ
IRLR2908
V
OUT
V
IN
12V
C
= 6.8μF
= 500mA
80V INPUT SURGE
TMR
I
LOAD
10Ω
102k
V
IN
V
SNS GATE OUT
FB
CC
20V/DIV
383k
V
CC
SHDN
4.99k
12V
12V
DC-DC
27V ADJUSTABLE CLAMP
100ms/DIV
+
IN
LT4356DE
CONVERTER
V
OUT
20V/DIV
100k
EN
SHDN
GND
UNDERVOLTAGE
A
FLT
FAULT
OUT
GND
TMR
4356 TA01b
4356 TA01
0.1μF
4356fa
1
LT4356-1/LT4356-2
(Notes 1 and 2)
ABSOLUTE MAXIMUM RATINGS
V , SHDN ................................................ –60V to 100V
Storage Temperature Range
CC
SNS............................. V – 30V or –60V to V + 0.3V
DE12.................................................. –65°C to 125°C
MS, SO .............................................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
CC
CC
OUT, A , FLT, EN...................................... –0.3V to 80V
OUT
GATE (Note 3).................................–0.3V to V
+ 10V
OUT
+
FB, TMR, IN ................................................ –0.3V to 6V
MS, SO ............................................................. 300°C
+
A
, EN, FLT, IN ...................................................–3mA
OUT
Operating Temperature Range
LT4356C................................................... 0°C to 70°C
LT4356I................................................ –40°C to 85°C
LT4356H ............................................ –40°C to 125°C
PIN CONFIGURATION
TOP VIEW
+
TOP VIEW
TMR
FB
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN
+
TMR
FB
1
2
3
4
5
6
12 IN
11
10 GND
NC
TOP VIEW
A
OUT
NC
A
OUT
FB
OUT
1
2
3
4
5
10 TMR
OUT
GATE
SNS
9
8
7
6
GND
EN
OUT
GATE
NC
NC
13
GATE
SNS
9
8
7
EN
GND
EN
FLT
V
CC
SHDN
FLT
MS PACKAGE
10-LEAD PLASTIC MSOP
V
SHDN
CC
SNS
FLT
V
SHDN
CC
T
= 125°C, θ = 120°C/W
JA
JMAX
DE PACKAGE
12-LEAD (4mm s 3mm) PLASTIC DFN
= 125°C, θ = 43°C/W
JA
EXPOSED PAD (PIN 13) PCB GND CONNECTION OPTIONAL
S PACKAGE
16-LEAD PLASTIC SO
= 150°C, θ = 100°C/W
T
JMAX
T
JMAX
JA
4356fa
2
LT4356-1/LT4356-2
ORDER INFORMATION
LEAD FREE FINISH
LT4356CDE-1#PBF
LT4356IDE-1#PBF
LT4356HDE-1#PBF
LT4356CDE-2#PBF
LT4356IDE-2#PBF
LT4356HDE-2#PBF
LT4356CMS-1#PBF
LT4356IMS-1#PBF
LT4356HMS-1#PBF
LT4356CS-1#PBF
LT4356IS-1#PBF
LT4356HS-1#PBF
LT4356CS-2#PBF
LT4356IS-2#PBF
LT4356HS-2#PBF
LEAD BASED FINISH
LT4356CDE-1
TAPE AND REEL
PART MARKING*
43561
PACKAGE DESCRIPTION
TEMPERATURE RANGE
0°C to 70°C
LT4356CDE-1#TRPBF
LT4356IDE-1#TRPBF
LT4356HDE-1#TRPBF
LT4356CDE-2#TRPBF
LT4356IDE-2#TRPBF
LT4356HDE-2#TRPBF
LT4356CMS-1#TRPBF
LT4356IMS-1#TRPBF
LT4356HMS-1#TRPBF
LT4356CS-1#TRPBF
LT4356IS-1#TRPBF
LT4356HS-1#TRPBF
LT4356CS-2#TRPBF
LT4356IS-2#TRPBF
LT4356HS-2#TRPBF
TAPE AND REEL
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
10-Lead Plastic MSOP
43561
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
43561
43562
43562
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
43562
LTCNS
LTCNS
10-Lead Plastic MSOP
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
LTCNS
10-Lead Plastic MSOP
LT4356S-1
LT4356S-1
LT4356S-1
LT4356S-2
LT4356S-2
LT4356S-2
PART MARKING*
43561
16-Lead Plastic SO
16-Lead Plastic SO
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
16-Lead Plastic SO
16-Lead Plastic SO
16-Lead Plastic SO
–40°C to 85°C
–40°C to 125°C
TEMPERATURE RANGE
0°C to 70°C
16-Lead Plastic SO
PACKAGE DESCRIPTION
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
10-Lead Plastic MSOP
LT4356CDE-1#TR
LT4356IDE-1#TR
LT4356IDE-1
43561
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
LT4356HDE-1
LT4356HDE-1#TR
LT4356CDE-2#TR
LT4356IDE-2#TR
43561
LT4356CDE-2
43562
LT4356IDE-2
43562
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
LT4356HDE-2
LT4356HDE-2#TR
LT4356CMS-1#TR
LT4356IMS-1#TR
LT4356HMS-1#TR
LT4356CS-1#TR
43562
LT4356CMS-1
LTCNS
LT4356IMS-1
LTCNS
10-Lead Plastic MSOP
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
LT4356HMS-1
LTCNS
10-Lead Plastic MSOP
LT4356CS-1
LT4356S-1
LT4356S-1
LT4356S-1
LT4356S-2
LT4356S-2
LT4356S-2
16-Lead Plastic SO
LT4356IS-1
LT4356CS-1#TR
16-Lead Plastic SO
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
LT4356HS-1
LT4356HS-1#TR
16-Lead Plastic SO
LT4356CS-2
LT4356CS-2#TR
16-Lead Plastic SO
LT4356IS-2
LT4356IS-2#TR
16-Lead Plastic SO
–40°C to 85°C
–40°C to 125°C
LT4356HS-2
LT4356HS-2#TR
16-Lead Plastic SO
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
4356fa
3
LT4356-1/LT4356-2
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V unless otherwise noted.
SYMBOL PARAMETER
Operating Voltage Range
Supply Current
CONDITIONS
MIN
TYP
MAX
80
UNITS
V
l
l
V
4
CC
I
CC
V
V
V
= Float
1
1.5
mA
CC
SHDN
+
= 0V, IN = 1.3V, LT4356-1
LT4356I-1, LT4356C-1
7
7
7
25
30
40
μA
μA
μA
SHDN
l
l
LT4356H-1
+
V
= 0V, IN = 1.3V, LT4356-2
60
60
60
70
100
250
μA
μA
μA
SHDN
LT4356I-2, LT4356C-2
LT4356H-2
l
l
l
l
I
Reverse Input Current
V
V
= V = –30V, SHDN Open
0.3
0.8
1
2
mA
mA
R
SNS
SNS
CC
= V = V
= –30V
CC
SHDN
l
l
GATE Pin Output High Voltage
GATE Pin Pull-Up Current
GATE Pin Pull-Down Current
V
= 4V; (V
– V
GATE
)
4.5
10
8
V
V
ΔV
CC
GATE
OUT
GATE
80V ≥ V ≥ 8V; (V
– V
)
16
CC
OUT
l
l
I
V
GATE
V
GATE
= 12V; V = 12V
= 48V; V = 48V
–4
–4.5
–23
–30
–36
–50
μA
μA
GATE(UP)
GATE(DN)
CC
CC
l
l
l
I
Overvoltage, V = 1.4V, V
= 12V
75
5
1.5
150
10
5
mA
mA
mA
FB
CC
GATE
Overcurrent, V – V
= 120mV, V
= 12V
SNS
GATE
Shutdown Mode, V
= 0V, V
= 12V
SHDN
GATE
l
l
V
FB Pin Servo Voltage
V
V
= 12V; V
= 12V; V
= 12V, LT4356I, LT4356C
= 12V, LT4356H
1.225
1.215
1.25
1.25
1.275
1.275
V
V
FB
GATE
GATE
OUT
OUT
l
I
FB
FB Pin Input Current
V
= 1.25V
FB
0.3
1
μA
l
l
l
l
Overcurrent Fault Threshold
45
42.5
46
50
50
51
51
55
55
56
56
mV
mV
mV
mV
ΔV
ΔV
ΔV
ΔV
ΔV
= (V – V ), V = 12V, LT4356I, LT4356C
CC SNS CC
SNS
SNS
SNS
SNS
SNS
= (V – V ), V = 12V, LT4356H
CC
SNS
CC
= (V – V ), V = 48V, LT4356I, LT4356C
CC
SNS
CC
43
= (V – V ), V = 48V, LT4356H
CC
SNS
CC
l
l
I
I
SNS Pin Input Current
V
= V = 12V to 48V
5
10
22
μA
SNS
SNS
CC
FLT, EN Pins Leakage Current
FLT, EN = 80V
A = 80V
OUT
2.5
4.5
μA
μA
LEAK
A
Pin Leakage Current
OUT
l
l
l
l
l
I
TMR Pin Pull-up Current
V
TMR
= 1V, V = 1.5V, (V – V ) = 0.5V
–1.5
–44
–3.5
–2.5
–195
–2.5
–50
–5.5
–4.5
–260
–4
μA
μA
μA
μA
μA
TMR
TMR
FB
CC
OUT
V
= 1V, V = 1.5V, (V – V ) = 75V
–56
FB
CC
OUT
V
= 1.3V, V = 1.5V
–8.5
–6.5
–315
TMR
FB
SNS
SNS
V
= 1V, ΔV
= 1V, ΔV
= 60mV, (V – V ) = 0.5V
TMR
CC OUT
V
TMR
= 60mV, (V – V ) = 80V
CC
OUT
l
TMR Pin Pull-down Current
TMR Pin Thresholds
1.5
2.2
2.7
μA
V
= 1V, V = 1V, ΔV = 0V
SNS
TMR
FB
l
l
V
TMR
FLT From High to Low, V = 5V to 80V
V
1.22
0.48
1.25
0.5
1.28
0.52
V
V
CC
From Low to High, V = 5V to 80V
CC
GATE
l
l
l
Early Warning Period
From FLT going Low to GATE going Low, V = 5V to 80V
80
100
1.25
0.3
120
1.28
1
mV
V
ΔV
CC
TMR
+
+
V
IN Pin Threshold
1.22
IN
+
+
+
I
I
IN Pin Input Current
V
= 1.25V
μA
IN
OUT
IN
l
l
OUT Pin Input Current
V
V
= V = 12V
200
6
300
14
μA
mA
OUT
OUT
CC
= V = 12V, V
= 0V
CC
SHDN
l
OUT Pin High Threshold
0.25
0.5
1.4
0.7
V
ΔV
ΔV
= V – V ; EN From Low to High
OUT CC OUT
OUT
V
SHDN Pin Threshold
V
= 12V to 48V
0.6
0.4
1.7
2.1
V
V
SHDN
CC
l
l
l
V
FLT, EN Pins Output Low
I
I
= 2mA
= 0.1mA
2
300
8
800
V
mV
OL
SINK
SINK
l
l
A
OUT
Pin Output Low
I
I
= 2mA
= 0.1mA
2
200
8
400
V
mV
SINK
SINK
4356fa
4
LT4356-1/LT4356-2
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
0.6
–1
TYP
1.2
–4
MAX
2.1
–8
4
UNITS
V
l
l
l
l
V
SHDN Pin Float Voltage
V
V
= 12V to 48V
SHDN(FLT)
CC
I
t
t
SHDN Pin Current
= 0V
μA
SHDN
SHDN
)
Overcurrent Turn Off Delay Time
Overvoltage Turn Off Delay Time
2
μs
GATE From High to Low, ΔV
= 0 → 120mV
OFF(OC
SNS
0.25
1
μs
GATE From High to Low, V = 0 → 1.5V
OFF(OV)
FB
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 3: An internal clamp limits the GATE pin to a minimum of 10V above
the OUT pin. Driving this pin to voltages beyond the clamp may damage
the device.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to GND unless otherwise
specified.
TYPICAL PERFORMANCE CHARACTERISTICS
Specifications are at VCC = 12V, TA = 25°C unless otherwise noted.
ICC vs VCC
ICC (Shutdown) vs VCC
ICC (Shutdown) vs VCC
1000
800
600
400
200
0
120
100
80
60
40
20
0
60
50
40
30
20
10
0
LT4356-2
LT4356-1
+
IN = 1.3V
0
10 20 30 40 50 60 70 80
(V)
0
10 20 30 40 50 60 70 80
(V)
0
10 20 30 40 50 60 70 80
(V)
V
V
CC
V
CC
CC
4356 G02
4356 G20
4356 G01
ICC (Shutdown) vs Temperature
ICC (Shutdown) vs Temperature
35
30
25
20
15
10
5
300
250
200
150
100
50
LT4356-1
LT4356-2
0
0
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
4356 G03
4356 G21
4356fa
5
LT4356-1/LT4356-2
TYPICAL PERFORMANCE CHARACTERISTICS
Specifications are at VCC = 12V, TA = 25°C unless otherwise noted.
GATE Pull-Up Current vs
Temperature
SHDN Current vs Temperature
GATE Pull-Up Current vs VCC
6
5
4
3
2
1
0
40
35
30
25
20
15
10
5
35
30
25
20
15
10
5
V
= 0V
V
= V
= 12V
OUT
SHDN
GATE
0
0
–50 –25
0
25
50
75 100 125
0
10 20 30 40 50 60 70 80
(V)
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
V
TEMPERATURE (°C)
CC
4356 G04
4356 G05
4356 G06
GATE Pull-Down Current vs
Temperature
GATE Pull-Down Current vs
Temperature
ΔVGATE vs IGATE
220
200
180
160
140
120
100
12
10
8
14
12
10
8
OVERVOLTAGE CONDITION
= 1.5V
OVERCURRENT CONDITION
ΔV = 120mV
V
= 12V
OUT
V
FB
SNS
6
6
4
4
2
2
0
0
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
0
2
4
6
8
10 12 14 16
(μA)
TEMPERATURE (°C)
TEMPERATURE (°C)
I
GATE
4356 G07
4356 G08
4356 G09
Overvoltage TMR Current vs
(VCC – VOUT
ΔVGATE vs Temperature
ΔVGATE vs VCC
)
48
40
32
24
16
8
14
12
10
8
16
14
12
10
8
OVERVOLTAGE CONDITION
I
= –1μA
GATE
T
= 130°C
A
V
V
= 5V
= 1V
OUT
TMR
V
= 8V
CC
T
= –45°C
A
T
= 25°C
A
6
6
V
= 4V
CC
4
4
2
2
I
= –1μA
CC
GATE
OUT
V
= V
0
0
0
0
10 20 30 40 50 60 70 80
– V (V)
–50 –25
0
25
50
75 100 125
0
10 20 30 40 50 60 70 80
(V)
V
TEMPERATURE (°C)
V
CC
CC
OUT
4356 G12
4356 G10
4356 G11
4356fa
6
LT4356-1/LT4356-2
TYPICAL PERFORMANCE CHARACTERISTICS
Specifications are at VCC = 12V, TA = 25°C unless otherwise noted.
Warning Period
TMR Current vs VCC
TMR Pull-Down Current vs
Temperature
Overcurrent TMR Current vs
(VCC – VOUT
)
14
12
10
8
3.0
280
240
200
160
120
80
OVERVOLTAGE, EARLY
WARNING PERIOD
V
= 1V
TMR
OVERCURRENT CONDITION
V
V
= 0V
= 1V
OUT
TMR
V
FB
V
TMR
= 1.5V
2.5
2.0
1.5
1.0
0.5
0
= 1.3V
6
4
2
40
0
0
0
10 20 30 40 50 60 70 80
(V)
–50 –25
0
25
50
75 100 125
0
10 20 30 40 50 60 70 80
V
TEMPERATURE (°C)
V
– V
(V)
OUT
CC
CC
4356 G14
4356 G15
4356 G13
Overvoltage Turn-Off Time vs
Temperature
Output Low Voltage vs Current
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
500
400
300
200
100
0
OVERVOLTAGE CONDITION
V
= 1.5V
FB
A
OUT
FLT
EN
0
0.5
1.0
1.5
2.0
2.5
3.0
–50 –25
0
25
50
75 100 125
CURRENT (mA)
TEMPERATURE (°C)
4356 G16
4356 G17
Overcurrent Turn-Off Time vs
Temperature
Reverse Current vs Reverse
Voltage
4.0
3.5
3.0
2.5
2.0
1.5
1.0
–20
–15
–10
–5
OVERCURRENT CONDITION
ΔV = 120mV
V
= SNS
CC
SNS
0
–50 –25
0
25
50
75 100 125
–40
0
–20
–60
–80
TEMPERATURE (°C)
V
(V)
CC
4356 G18
4356 G19
4356fa
7
LT4356-1/LT4356-2
PIN FUNCTIONS
OUT: Output Voltage Sense Input. This pin senses the
voltage at the source of the N-channel MOSFET and sets
the fault timer current. When the OUT pin voltage reaches
A
(DFN and SO Packages Only): Amplifier Output.
OUT
Opencollectoroutputoftheauxiliaryamplifier.Itiscapable
of sinking up to 2mA from 80V. The negative input of the
amplifier is internally connected to a 1.25V reference.
0.7V away from V , the EN pin goes high impedance.
CC
SHDN: Shutdown Control Input. The LT4356 can be shut
downtoalowcurrentmodebypullingtheSHDNpinbelow
0.4V. Pull this pin above 2.1V or disconnect it and allow
the internal current source to turn the part back on. The
leakage current to ground at the pin should be limited to
no more than 1μA if no pull up device is used to turn the
part on. The SHDN pin can be pulled up to 100V or below
GND by 60V without damage. In shutdown, the auxiliary
amplifierturnsoffintheLT4356-1butcontinuesoperating
in the LT4356-2.
EN: Open-Collector Enable Output. The EN pin goes high
impedance when the voltage at the OUT pin is above (V
CC
– 0.7V), indicating the external MOSFET is fully on. The
state of the pin is latched until the OUT pin voltage resets
at below 0.5V and goes back up above 2V. The internal
NPN is capable of sinking up to 3mA of current from 80V
to drive an LED or opto-coupler.
Exposed Pad (DFN Package Only): Exposed pad may be
left open or connected to device ground (GND).
FB: Voltage Regulator Feedback Input. Connect this pin
to the center tap of the output resistive divider connected
between the OUT pin and ground. During an overvoltage
condition, the GATE pin is servoed to maintain a 1.25V
threshold at the FB pin. This pin is clamped internally to
7V. Tie to GND to disable the OV clamp.
SNS:CurrentSenseInput.Connectthispintotheoutputof
thecurrentsenseresistor.Thecurrentlimitcircuitcontrols
the GATE pin to limit the sense voltage between V and
CC
SNS pins to 50mV. At the same time the sense amplifier
also starts a current source to charge up the TMR pin.
This pin can be pulled below GND by up to 60V, though
FLT: Open-Collector Fault Output. This pin pulls low
after the voltage at the TMR pin has reached the fault
threshold of 1.25V. It indicates the pass transistor is
about to turn off because either the supply voltage has
stayed at an elevated level for an extended period of
time (voltage fault) or the device is in an overcurrent
condition (current fault). The internal NPN is capable of
sinking up to 3mA of current from 80V to drive an LED or
opto-coupler.
the voltage difference with the V pin must be limited to
CC
less than 30V. Connect to V if unused.
CC
TMR: Fault Timer Input. Connect a capacitor between this
pin and ground to set the times for early warning, fault
and cool down periods. The current charging up this pin
during fault conditions depends on the voltage difference
between the V and OUT pins. When V
reaches 1.25V,
CC
TMR
the FLT pin pulls low to indicate the detection of a fault
condition. If the condition persists, the pass transistor
GATE:N-ChannelMOSFETGateDriveOutput.TheGATEpin
ispulledupbyaninternalchargepumpcurrentsourceand
clamped to 14V above the OUT pin. Both voltage and cur-
rent amplifiers control the GATE pin to regulate the output
voltage and limit the current through the MOSFET.
turns off when V
reaches the threshold of 1.35V. As
TMR
soon as the fault condition disappears, the pull up current
stops and a 2μA current starts to pull the TMR pin down.
When V
reaches the retry threshold of 0.5V, the GATE
TMR
pin pulls high turning back on the pass transistor.
GND: Device Ground.
V : Positive Supply Voltage Input. The positive supply
CC
input ranges from 4V to 80V for normal operation. It
can also be pulled below ground potential by up to 60V
during a reverse battery condition, without damaging the
part. The supply current is reduced to 7μA with all the
functional blocks off.
+
IN (DFN and SO Packages Only): Positive Input of the
Auxiliary Amplifier. This amplifier can be used as a level
detection comparator with external hysteresis or linear
regulatorcontrollinganexternalPNPtransistor. Thispinis
clamped internally to 7V. Connect to ground if unused.
4356fa
8
LT4356-1/LT4356-2
BLOCK DIAGRAM
V
SNS
GATE
OUT
CC
14V
+
50mV
–
CHARGE
PUMP
FB
+
+
–
VA
IA
–
1.25V
SHDN
FLT
A
OUT
OC
OUT
OV
–
+
1.25V
SHDN
EN
CONTROL
LOGIC
AUXILIARY
AMPLIFIER
RESTART
GATEOFF FLT
+
IN
1.35V
–
+
V
CC
+
–
0.5V
I
TMR
+
–
2μA
1.25V
TMR
GND
4356 BD
4356fa
9
LT4356-1/LT4356-2
OPERATION
Some power systems must cope with high voltage surges
of short duration such as those in automobiles. Load
circuitry must be protected from these transients, yet
high availability systems must continue operating during
these events.
The potential at the TMR pin starts decreasing as soon as
the overvoltage condition disappears. When the voltage
at the TMR pin reaches 0.5V the GATE pin begins rising,
turning on the MOSFET. The FLT pin will then go to a high
impedance state.
The LT4356 is an overvoltage protection regulator that
drives an external N-channel MOSFET as the pass transis-
tor. It operates from a wide supply voltage range of 4V to
80V. It can also be pulled below ground potential by up
to 60V without damage. The low power supply require-
ment of 4V allows it to operate even during cold cranking
conditionsinautomotiveapplications. Theinternalcharge
pump turns on the N-channel MOSFET to supply current
to the loads with very little power loss. Two MOSFETs can
be connected back to back to replace an inline Schottky
diode for reverse input protection. This improves the ef-
ficiency and increases the available supply voltage level
to the load circuitry during cold crank.
The fault timer allows the load to continue functioning
duringshorttransienteventswhileprotectingtheMOSFET
from being damaged by a long period of supply overvolt-
age, such as a load dump in automobiles. The timer period
varieswiththevoltageacrosstheMOSFET.Ahighervoltage
corresponds to a shorter fault timer period, ensuring the
MOSFET operates within its safe operating area (SOA).
The LT4356 senses an overcurrent condition by monitor-
ing the voltage across an optional sense resistor placed
between the V and SNS pins. An active current limit
CC
circuit (IA) controls the GATE pin to limit the sense volt-
age to 50mV. A current is also generated to start charging
up the TMR pin. This current is about 5 times the current
generated during an overvoltage event. The FLT pin pulls
low when the voltage at the TMR pin reaches 1.25V and
the MOSFET is turned off when it reaches 1.35V.
Normally, the pass transistor is fully on, powering the
loads with very little voltage drop. When the supply volt-
age surges too high, the voltage amplifier (VA) controls
the gate of the MOSFET and regulates the voltage at the
source pin to a level that is set by the external resistive
divider from the OUT pin to ground and the internal 1.25V
reference. A current source starts charging up the capaci-
tor connected at the TMR pin to ground. If the voltage at
An auxiliary amplifier is provided with the negative input
connected to an internal 1.25V reference. The output pull
down device is capable of sinking up to 2mA of current
allowing it to drive an LED or opto coupler. This amplifier
can be configured as a linear regulator controller driving
an external PNP transistor or a comparator function to
monitor voltages.
the TMR pin, V , reaches 1.25V, the FLT pin pulls low
TMR
to indicate impending turn-off due to the overvoltage
condition. The pass transistor stays on until the TMR
pin reaches 1.35V, at which point the GATE pin pulls low
turning off the MOSFET.
A shutdown pin turns off the pass transistor and reduces
the supply current to less than 7μA for the LT4356-1. The
supply current drops down to 60μA while keeping the
internal reference and the auxiliary amplifier active for the
LT4356-2 version during shutdown.
4356fa
10
LT4356-1/LT4356-2
APPLICATIONS INFORMATION
The LT4356 can limit the voltage and current to the load
circuitry during supply transients or overcurrent events.
The total fault timer period should be set to ride through
short overvoltage transients while not causing damage
to the pass transistor. The selection of this N-channel
MOSFET pass transistor is critical for this application.
It must stay on and provide a low impedance path from
the input supply to the load during normal operation and
then dissipate power during overvoltage or overcurrent
conditions.
Overcurrent Fault
The LT4356 features an adjustable current limit that
protects against short circuits or excessive load current.
During an overcurrent event, the GATE pin is regulated to
limit the current sense voltage across the V and SNS
pins to 50mV.
CC
Anovercurrentfaultoccurswhenthecurrentlimitcircuitry
has been engaged for longer than the time-out delay set
by the timer capacitor. The GATE pin is then immediately
pulled low by a 10mA current to GND turning off the
MOSFET. After the fault condition has disappeared and a
cool down period has transpired, the GATE pin is allowed
to pull back up and turn on the pass transistor.
The following sections describe the overcurrent and the
overvoltage faults, and the selection of the timer capacitor
value based on the required warning time. The selection
of the N-channel MOSFET pass transistor is discussed
next. Auxiliary amplifier, reverse input, and the shutdown
functionsarecoveredaftertheMOSFETselection.External
component selection is discussed in detail in the Design
Example section.
Fault Timer
The LT4356 includes an adjustable fault timer pin. Con-
necting a capacitor from the TMR pin to ground sets the
delay timer period before the MOSFET is turned off. The
same capacitor also sets the cool down period before the
MOSFETisallowedtoturnbackonafterthefaultcondition
has disappeared.
Overvoltage Fault
The LTC4356 limits the voltage at the OUT pin during an
overvoltage situation. An internal voltage amplifier regu-
lates the GATE pin voltage to maintain a 1.25V threshold at
the FB pin. During this period of time, the power MOSFET
is still on and continues to supply current to the load. This
allows uninterrupted operation during short overvoltage
transient events.
Once a fault condition, either overvoltage or overcurrent,
is detected, a current source charges up the TMR pin. The
current level varies depending on the voltage drop across
thedrainandsourceterminalsofthepowerMOSFET(V ),
which is typically from the V pin to the OUT pin. This
scheme takes better advantage of the available Safe
Operating Area (SOA) of the MOSFET than would a fixed
timer current. The timer function operates down to V
5V across the whole temperature range.
DS
CC
When the voltage regulation loop is engaged for longer
than the time-out period, set by the timer capacitor con-
nectedfromtheTMRpintoground, anovervoltagefaultis
detected. The GATE pin is pulled down to the OUT pin by a
150mA current. After the fault condition has disappeared
andacooldownperiodhastranspired, theGATEpinstarts
to pull high again. This prevents the power MOSFET from
being damaged during a long period of overvoltage, such
as during load dump in automobiles.
=
CC
4356fa
11
LT4356-1/LT4356-2
APPLICATIONS INFORMATION
Fault Timer Current
When the voltage at the TMR pin, V , reaches the 1.25V
TMR
threshold, the FLT pin pulls low to indicate the detection
of a fault condition and provide warning to the load of
the impending power loss. In the case of an overvoltage
fault, the timer current then switches to a fixed 5μA. The
interval between FLT asserting low and the MOSFET turn-
ing off is given by:
The timer current starts at around 2μA with 0.5V or less
of V , increasing linearly to 50μA with 75V of V dur-
DS
DS
ing an overvoltage fault (Figure 1). During an overcurrent
fault, it starts at 4μA with 0.5V or less of V but increases
DS
to 260μA with 80V across the MOSFET (Figure 2). This
arrangement allows the pass transistor to turn off faster
duringanovercurrentevent,sincemorepowerisdissipated
during this condition. Refer to the Typical Performance
Characteristics section for the timer current at different
CTMR • 100mV
tWARNING
=
5μA
V
in both overvoltage and overcurrent events.
DS
V
TMR(V)
I
= 5μA
I
= 5μA
TMR
TMR
1.35
1.25
V
TMR
= 75V
= 50μA)
DS
(I
V
TMR
= 10V
= 8μA)
DS
(I
0.50
TIME
t
t
WARNING
= 20ms/μF
FLT
= 15ms/μF
t
= 93.75ms/μF
t
WARNING
= 20ms/μF
FLT
TOTAL FAULT TIMER = t + t
4356 F01
FLT WARNING
Figure 1. Overvoltage Fault Timer Current
V
TMR(V)
1.35
1.25
V
TMR
= 80V
DS
V
TMR
= 10V
= 35μA)
(I
= 260μA)
DS
(I
0.50
TIME
t
WARNING
= 0.38ms/μF
t
FLT
= 2.88ms/μF
t
= 21.43ms/μF
FLT
t
WARNING
4356 F02
= 2.86ms/μF
TOTAL FAULT TIMER = t + t
FLT WARNING
Figure 2. Overcurrent Fault Timer Current
4356fa
12
LT4356-1/LT4356-2
APPLICATIONS INFORMATION
This fixed early warning period allows the systems to per-
formnecessarybackuporhouse-keepingfunctionsbefore
voltage N-channel MOSFETs. For systems with V less
than 8V, a logic level MOSFET is required since the gate
drive can be as low as 4.5V.
CC
the power supply is cut off. After V
crosses the 1.35V
TMR
threshold, the pass transistor turns off immediately. Note
that during an overcurrent event, the timer current is not
The SOA of the MOSFET must encompass all fault condi-
tions. In normal operation the pass transistor is fully on,
dissipating very little power. But during either overvoltage
or overcurrent faults, the GATE pin is servoed to regu-
late either the output voltage or the current through the
MOSFET. Large current and high voltage drop across the
MOSFET can coexist in these cases. The SOA curves of
the MOSFET must be considered carefully along with the
selection of the fault timer capacitor.
reduced to 5μA after V
has reached 1.25V threshold,
TMR
since it would lengthen the overall fault timer period and
cause more stress on the power MOSFET.
As soon as the fault condition has disappeared, a 2μA
current starts to discharge the timer capacitor to ground.
WhenV
reachesthe0.5Vthreshold,theinternalcharge
TMR
pump starts to pull the GATE pin high, turning on the
MOSFET. The TMR pin is then actively regulated to 0.5V
until the next fault condition appears. The total cool down
timer period is given by:
Transient Stress in the MOSFET
During an overvoltage event, the LT4356 drives a series
passMOSFETtoregulatetheoutputvoltageatanacceptable
level.Theloadcircuitrymaycontinueoperatingthroughout
this interval, but only at the expense of dissipation in the
MOSFET pass device. MOSFET dissipation or stress is a
function of the input voltage waveform, regulation voltage
and load current. The MOSFET must be sized to survive
this stress.
CTMR • 0.85V
tCOOL
=
2μA
MOSFET Selection
The LT4356 drives an N-channel MOSFET to conduct the
load current. The important features of the MOSFET are
on-resistanceR
(BR)DSS
,themaximumdrain-sourcevoltage
DS(ON)
Most transient event specifications use the model shown
in Figure 3. The idealized waveform comprises a linear
V
, the threshold voltage, and the SOA.
The maximum allowable drain-source voltage must be
higher than the supply voltage. If the output is shorted
to ground or during an overvoltage event, the full supply
voltage will appear across the MOSFET.
ramp of rise time t, reaching a peak voltage of V and
r
PK
exponentially decaying back to V with a time constant
IN
of t. A common automotive transient specification has
constants of t = 10μs, V = 80V and τ = 1ms. A surge
r
PK
condition known as “load dump” has constants of t =
r
The gate drive for the MOSFET is guaranteed to be more
5ms, V = 60V and τ = 200ms.
PK
than10Vandlessthan16VforthoseapplicationswithV
CC
higher than 8V. This allows the use of standard threshold
V
PK
τ
V
IN
t
r
4356 F03
Figure 3. Prototypical Transient Waveform
4356fa
13
LT4356-1/LT4356-2
APPLICATIONS INFORMATION
V
MOSFET stress is the result of power dissipated within
the device. For long duration surges of 100ms or more,
stress is increasingly dominated by heat transfer; this is
a matter of device packaging and mounting, and heatsink
thermal mass. This is analyzed by simulation, using the
MOSFET thermal model.
PK
T
V
REG
V
IN
t
r
Forshortdurationtransientsoflessthan100ms, MOSFET
survival is increasingly a matter of safe operating area
(SOA), an intrinsic property of the MOSFET. SOA quanti-
4356 F04
Figure 4. Safe Operating Area Required to Survive Prototypical
Transient Waveform
fies the time required at any given condition of V and
DS
I to raise the junction temperature of the MOSFET to its
Typically V
≈ V and τ >> t simplifying the above to
IN r
D
REG
rated maximum. MOSFET SOA is expressed in units of
1
P2t = ILOAD V – V
2 τ
(W2s)
2
2
watt-squared-seconds(P t).Thisfigureisessentiallycon-
(
)
PK
REG
2
stant for intervals of less than 100ms for any given device
type, and rises to infinity under DC operating conditions.
Destruction mechanisms other than bulk die temperature
distort the lines of an accurately drawn SOA graph so that
For the transient conditions of V = 80V, V = 12V, V
PK
IN
REG
2
= 16V, t = 10μs and τ = 1ms, and a load current of 3A, P t
r
2
is18.4W s—easilyhandledbyaMOSFETinaD-pakpack-
2
P t is not the same for all combinations of I and V .
2
D
DS
age. The P t of other transient waveshapes is evaluated by
2
In particular P t tends to degrade as V approaches the
DS
integrating the square of MOSFET power versus time.
maximum rating, rendering some devices useless for
absorbing energy above a certain voltage.
Calculating Short-Circuit Stress
SOAstressmustalsobecalculatedforshort-circuitcondi-
Calculating Transient Stress
2
tions. Short-circuit P t is given by:
To select a MOSFET suitable for any given application, the
SOA stress must be calculated for each input transient
whichshallnotinterruptoperation.Itisthenasimplematter
to chose a device which has adequate SOA to survive the
maximumcalculatedstress.P tforaprototypicaltransient
waveform is calculated as follows (Figure 4).
2
2
2
P t = (V • ΔV /R ) • t
(W s)
IN
SNS SNS
TMR
where, ΔV
is the SENSE pin threshold, and t
is the
TMR
SNS
overcurrent timer interval.
2
For V = 14.7V, V
= 50mV, R
= 12mΩ and C
SNS TMR
IN
SNS
2
2
= 100nF, P t is 6.6W s—less than the transient SOA
calculated in the previous example. Nevertheless, to
accountforcircuittolerancesthisfigureshouldbedoubled
Let
a = V
– V
IN
IN
REG
2
to 13.2W s.
b = V – V
PK
(V = Nominal Input Voltage)
IN
Limiting Inrush Current and GATE Pin Compensation
Then
TheLT4356limitstheinrushcurrenttoanyloadcapacitance
by controlling the GATE pin voltage slew rate. An external
capacitor can be connected from GATE to ground to slow
down the inrush current further at the expense of slower
turn-off time. The gate capacitor is set at:
3
⎡
⎢
⎤
⎥
b− a
1
3
(
1
2
b
a
)
+ τ 2a2 ln + 3a2 +b2 − 4ab
⎜
⎛
⎝
⎞
2
P2t = ILOAD
tr
⎟
⎠
b
⎢
⎥
⎣
⎦
IGATE(UP)
C1 =
•CL
I
INRUSH
4356fa
14
LT4356-1/LT4356-2
APPLICATIONS INFORMATION
R
The LTC4356 does not need extra compensation compo-
nents at the GATE pin for stability during an overvoltage or
overcurrent event. With transient input voltage step faster
than 5V/μs, a gate capacitor, C1, to ground is needed to
prevent self enhancement of the N-channel MOSFET.
LIM
2N2905A OR
*4.7Ω
BCP53
2.5V OUTPUT
≈ 150mA MAX
INPUT
10μF
47nF
*OPTIONAL FOR
CURRENT LIMIT
R6
100k
D1*
BAV99
R4ꢁR5
R5
VOUT ꢀ1.25
11
The extra gate capacitance slows down the turn off time
during fault conditions and may allow excessive current
duringanoutputshortevent.Anextraresistor,R1,inseries
with the gate capacitor can improve the turn off time. A
diode, D1, should be placed across R1 with the cathode
connected to C1 as shown in Figure 5.
R4
A
OUT
0.7
RLIM
249k
ILIM
z
LT4356S
12
+
IN
4356 F06
R5
249k
Figure 6. Auxiliary LDO Output with Optional Current Limit
Q1
Reverse Input Protection
D1
A blocking diode is commonly employed when reverse
input potential is possible, such as in automotive applica-
tions. This diode causes extra power loss, generates heat,
and reduces the available supply voltage range. During
cold crank, the extra voltage drop across the diode is
particularly undesirable.
IN4148W
R3
R1
C1
GATE
LT4356S
The LT4356 is designed to withstand reverse voltage
4356 F05
without damage to itself or the load. The V , SNS, and
CC
Figure 5
SHDN pins can withstand up to 60V of DC voltage below
the GND potential. Back-to-back MOSFETs must be used
to eliminate the current path through their body diodes
(Figure 7). Figure 8 shows the approach with a P-Channel
MOSFET in place of Q2.
Auxiliary Amplifier
An uncommitted amplifier is included in the LT4356 to
provide flexibility in the system design. With the negative
input connected internally to the 1.25V reference, the am-
plifier can be connected as a level detect comparator with
R
Q2
IRLR2908
Q1
IRLR2908
SNS
10mΩ
V
V
OUT
IN
12V
12V, 3A
CLAMPED
AT 16V
external hysteresis. The open collector output pin, A
,
OUT
D2*
SMAJ58CA
R4
10Ω
R3
10Ω
R5
1M
Q3
2N3904
is capable of driving an opto or LED. It can also interface
with the system via a pull-up resistor to a supply voltage
up to 80V. Another use is to implement undervoltage
lockout, as shown in the typical application “Overvoltage
Regulator with Undervoltage Lockout.” In shutdown, the
auxiliary amplifier turns off in the LT4356-1 but continues
operating in the LT4356-2.
R1
59k
D1
1N4148
R7
10k
5
4
3
SNS
GATE OUT
FB
6
2
V
CC
R2
4.99k
LT4356S
The amplifier can also be configured as a low dropout
linearregulatorcontroller. WithanexternalPNPtransistor,
such as 2N2905A, it can supply up to 100mA of current
with only a few hundred mV of dropout voltage. Current
limit can be easily included by adding two diodes and one
resistor (Figure 6).
7
11
12
SHDN
8
9
A
FLT
OUT
+
IN
EN
4356 F07
GND
10
TMR
1
C
TMR
0.1μF
*DIODES INC.
Figure 7. Overvoltage Regulator with N-channel MOSFET
Reverse Input Protection
4356fa
15
LT4356-1/LT4356-2
APPLICATIONS INFORMATION
R
Q2
Si4435
Q1
IRLR2908
SNS
10mΩ
V
V
OUT
IN
12V
D2*
SMAJ58CA
12V, 3A
CLAMPED
AT 16V
D1
1N5245
15V
R3
10Ω
R6
10k
R1
59k
5
4
3
SNS
GATE OUT
6
2
V
FB
CC
R2
4.99k
LT4356S
7
11
12
SHDN
8
9
A
FLT
OUT
+
IN
EN
GND
10
TMR
1
4356 F08
C
TMR
*DIODES INC.
0.1μF
Figure 8. Overvoltage Regulator with P-Channel MOSFET
Reverse Input Protection
Shutdown
A total bulk capacitance of at least 22μF low ESR electro-
lytic is required close to the source pin of MOSFET Q1. In
addition, the bulk capacitance should be at least 10 times
larger than the total ceramic bypassing capacitor on the
input of the DC/DC converter.
The LT4356 can be shut down to a low current mode when
the voltage at the SHDN pin goes below the shutdown
threshold of 0.6V. The quiescent current drops to 7μA for
the LT4356-1 and 60μA for the LT4356-2 which leaves the
auxiliary amplifier on.
The SHDN pin can be pulled up to V or below GND by
R
CC
Q1
SNS
10mΩ
IRLR2908
up to 60V without damaging the pin. Leaving the pin open
allows an internal current source to pull it up and turn
on the part while clamping the pin to 2.5V. The leakage
current at the pin should be limited to no more than 1μA
if no pull up device is used to help turn it on.
V
IN
C *
L
22μF
D2
SMAJ58A
R3
10Ω
R1
59k
5
4
3
SNS GATE OUT
6
V
CC
2
Supply Transient Protection
FB
R4
383k
7
V
CC
SHDN
R2
4.99k
The LT4356 is guaranteed to be safe from damage with
supply voltages up to 100V. Nevertheless, voltage tran-
sients above 100V may cause permanent damage. During
ashort-circuitcondition,thelargechangeincurrentflowing
through power supply traces and associated wiring can
cause inductive voltage transients which could exceed
100V. To minimize the voltage transients, the power trace
parasitic inductance should be minimized by using wide
traces. A small surge suppressor, D2, in Figure 9, at the
input will clamp the voltage spikes.
12
DC-DC
CONVERTER
+
IN
LT4356S
R5
9
8
100k
EN
SHDN
GND
11
UNDERVOLTAGE
A
FLT
FAULT
OUT
GND
10
TMR
4356 F09
1
*SANYO 25CE22GA
C
TMR
47nF
Figure 9. Overvoltage Regulator with Low-Battery Detection
4356fa
16
LT4356-1/LT4356-2
APPLICATIONS INFORMATION
Layout Considerations
Next calculate the sense resistor, R , value:
SNS
To achieve accurate current sensing, Kelvin connection
50mV 50mV
RSNS
=
=
= 10mΩ
to the current sense resistor (R
in Figure 9) is recom-
SNS
ILIM
5A
mended. The minimum trace width for 1oz copper foil is
0.02" per amp to ensure the trace stays at a reasonable
temperature. 0.03" per amp or wider is recommended.
Note that 1oz copper exhibits a sheet resistance of about
530μΩ/square.Smallresistancescancauselargeerrorsin
highcurrentapplications.Noiseimmunitywillbeimproved
significantly by locating resistive dividers close to the pins
C
is then chosen for 1ms of early warning time:
TMR
1ms • 5μA
CTMR
=
= 50nF
100mV
The closest standard value for C
is 47nF.
TMR
Finally,calculateR4andR5forthe6Vlowbatterythreshold
detection:
with short V and GND traces.
CC
Design Example
1.25V • R4 + R5
(
)
6V =
As a design example, take an application with the follow-
R5
ing specifications: V = 8V to 14V DC with transient up
CC
to 80V, V
≤ 16V, current limit (I ) at 5A, low battery
Choose 100k for R5.
OUT
LIM
detection at 6V, and 1ms of overvoltage early warning
(Figure 9).
6V – 1.25V • R5
(
)
R4 =
= 380k
1.25V
First, calculate the resistive divider value to limit V
16V during an overvoltage event:
to
OUT
Select 383k for R4.
1.25V • R1 + R2
(
)
=16V
The pass transistor, Q1, should be chosen to withstand
VREG
=
the output short condition with V = 14V.
R2
CC
The total overcurrent fault time is:
Set the current through R1 and R2 during the overvoltage
condition to 250μA.
47nF • 0.85V
tOC
=
= 0.878ms
45.5μA
1.25V
R2 =
= 5k
250μA
Choose 4.99k for R2.
16V – 1.25V • R2
The power dissipation on Q1 equals to:
14V • 50mV
P =
= 70W
10mΩ
(
)
R1 =
= 58.88k
1.25V
The closest standard value for R1 is 59k.
These conditions are well within the Safe Operating Area
of IRLR2908.
4356fa
17
LT4356-1/LT4356-2
TYPICAL APPLICATIONS
Wide Input Range 5V to 28V Hot Swap
with Undervoltage Lockout
R
Q1
SNS
20mΩ
SUD50N03-10
V
V
OUT
IN
100μF
R6
118k
R3
10Ω
C1
47nF
V
SNS GATE OUT
FB
CC
SHDN
A
OUT
+
IN
LT4356DE-1
R7
49.9k
FLT
EN
GND
TMR
4356 TA02
C
TMR
1μF
24V Overvoltage Regulator Withstands 150V at VIN
Q1
IRF640
V
V
OUT
IN
24V
CLAMPED AT 32V
R9
1k
1W
R3
10Ω
R1
118k
5
4
3
SNS
GATE
LT4356DE
TMR
OUT
6
2
V
FB
CC
D2*
SMAT70A
R2
4.99k
7
8
9
SHDN
FLT
EN
GND
10
4356 TA03
1
C
TMR
*DIODES INC.
0.1μF
4356fa
18
LT4356-1/LT4356-2
TYPICAL APPLICATIONS
Overvoltage Regulator with Undervoltage Lockout
R
Q1
IRLR2908
SNS
20mΩ
V
OUT
V
IN
CLAMPED AT 16V
D2*
R6
280k
R4
1M
SMAJ58A
R3
10Ω
R1
59k
V
SNS GATE OUT
FB
CC
R5
SHDN
1M
R2
4.99k
A
OUT
+
UV RISING = 5.04V
IN
LT4356DE-2
R7
100k
FLT
EN
GND
TMR
*DIODES INC.
4356 TA04
C
TMR
0.1μF
Overvoltage Regulator with Low Battery Detection and Output Keep Alive During Shutdown
1k
0.5W
R
SNS
Q1
IRLR2908
V
10mΩ
OUT
V
IN
12V, 4A
12V
CLAMPED AT 16V
D2*
SMAJ58A
R3
D1
10Ω
Q2
1N4746A
18V
R4
402k
VN2222
1W
5
SNS
4
3
OUT
R1
294k
GATE
6
V
2
CC
FB
R2
24.9k
V
DD
R6
47k
LT4356DE
12
7
11
8
+
IN
A
LBO
OUT
R5
105k
SHDN
FLT
9
EN
GND
10
TMR
1
*DIODES INC.
4356 TA05
C
TMR
0.1μF
4356fa
19
LT4356-1/LT4356-2
TYPICAL APPLICATIONS
2.5A, 48V Hot Swap with Overvoltage Output Regulation at 72V and UV Shutdown at 35V
R
Q1
FDB3632
SNS
15mΩ
V
V
OUT
IN
48V
48V
2.5A
R4
140k
R6
100k
D2*
SMAT70A
R3
10Ω
C
L
300μF
C1
6.8nF
6
5
4
3
OUT
D1
1N4714
BV = 33V
V
SNS GATE
R7
CC
1M
12
2
+
IN
7
SHDN
R5
4.02k
R8
47k
R1
226k
LT4356DE
FB
R2
4.02k
8
9
FLT
11
EN
A
PWRGD
OUT
GND
10
TMR
1
*DIODES INC.
4356 TA06
C
TMR
0.1μF
2.5A, 28V Hot Swap with Overvoltage Output Regulation at 36V and UV Shutdown at 15V
R
Q1
FDB3632
SNS
15mΩ
V
V
OUT
IN
28V
28V
2.5A
R4
113k
R6
27k
D2*
SMAT70A
R3
10Ω
C
L
300μF
C1
6.8nF
6
5
4
3
OUT
D1
1N4700
BV = 13V
V
SNS GATE
R7
CC
1M
12
2
+
IN
7
SHDN
R5
4.02k
R8
47k
R1
110k
LT4356DE
FB
R2
4.02k
8
9
FLT
11
EN
A
PWRGD
OUT
GND
10
TMR
1
*DIODES INC.
4356 TA07
C
TMR
0.1μF
4356fa
20
LT4356-1/LT4356-2
TYPICAL APPLICATIONS
Overvoltage Regulator with Reverse Input Protection Up to –80V
R
Q2
IRLR2908
Q1
IRLR2908
SNS
10mΩ
V
V
OUT
IN
12V
12V, 3A
CLAMPED
AT 16V
D2*
SMAJ58CA
R4
10Ω
R3
10Ω
R5
1M
Q3
2N3904
6
5
SNS
4
3
R1
59k
V
GATE OUT
FB
CC
D1
1N4148
2
R7
10k
R2
4.99k
D3**
IN4148
LT4356DE
7
SHDN
11
12
8
9
A
FLT
OUT
+
IN
EN
GND
10
TMR
4356 TA08
1
*
DIODES INC.
C
TMR
** OPTIONAL COMPONENT FOR
REDUCED STANDBY CURRENT
0.1μF
4356fa
21
LT4356-1/LT4356-2
PACKAGE DESCRIPTION
DE/UE Package
12-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1695 Rev D)
0.70 0.05
3.30 0.05
3.60 0.05
2.20 0.05
1.70 0.05
PACKAGE OUTLINE
0.25 0.05
0.50 BSC
2.50 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.40 0.10
4.00 0.10
(2 SIDES)
R = 0.115
TYP
7
12
R = 0.05
TYP
3.30 0.10
3.00 0.10
(2 SIDES)
1.70 0.10
PIN 1
TOP MARK
(NOTE 6)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
(UE12/DE12) DFN 0806 REV D
6
1
0.25 0.05
0.75 0.05
0.200 REF
0.50 BSC
2.50 REF
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION
(WGED) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
4356fa
22
LT4356-1/LT4356-2
PACKAGE DESCRIPTION
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
0.889 0.127
(.035 .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
3.00 0.102
(.118 .004)
(NOTE 3)
(.0197)
0.497 0.076
(.0196 .003)
0.50
0.305 0.038
(.0120 .0015)
TYP
10 9
8
7 6
BSC
REF
RECOMMENDED SOLDER PAD LAYOUT
3.00 0.102
(.118 .004)
(NOTE 4)
4.90 0.152
(.193 .006)
DETAIL “A”
0° – 6° TYP
0.254
(.010)
GAUGE PLANE
1
2
3
4 5
0.53 0.152
(.021 .006)
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 0.0508
(.004 .002)
0.50
(.0197)
BSC
MSOP (MS) 0307 REV E
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
4356fa
23
LT4356-1/LT4356-2
PACKAGE DESCRIPTION
S Package
16-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.386 – .394
(9.804 – 10.008)
.045 p.005
NOTE 3
.050 BSC
16
N
15
14
13
12
11
10
9
N
1
.245
MIN
.160 p.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
2
3
N/2
N/2
8
.030 p.005
TYP
RECOMMENDED SOLDER PAD LAYOUT
2
3
5
6
7
1
4
.010 – .020
(0.254 – 0.508)
s 45o
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0o – 8o TYP
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
.016 – .050
(0.406 – 1.270)
S16 0502
NOTE:
1. DIMENSIONS IN
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
4356fa
24
LT4356-1/LT4356-2
REVISION HISTORY (Revision history begins at Rev A)
REV
DATE
DESCRIPTION
PAGE NUMBER
A
05/10 Revised Features and Description
1
Added parameters to V and updated Max value for V
in the Electrical Characteristics section
4, 5
8
OL
SHDN(FLT)
Revised Pin Functions section
Replaced Figure 6 and made text edits in the Operation and Applications Information sections
Updated drawings in the Typical Applications section
10-17
19, 21
4356fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
25
LT4356-1/LT4356-2
TYPICAL APPLICATION
Overvoltage Regulator with Linear Regulator Up to 100mA
Q2
2N2905A
2.5V, 100mA
C5
10μF
R
Q1
IRLR2908
SNS
10mΩ
V
IN
12V
V
OUT
12V, 3A
CLAMPED AT 16V
D2*
SMAJ58A
R3
R1
10Ω
59k
5
4
3
SNS
GATE
OUT
R6
100k
6
2
V
A
FB
CC
R2
4.99k
R4
249k
C3
47nF
LT4356DE
11
7
12
8
+
IN
OUT
R5
249k
SHDN
FLT
9
EN
GND
10
TMR
*DIODES INC.
4356 TA09
1
C
TMR
0.1μF
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1641-1/LT1641-2 Positive High Voltage Hot Swap™ Controllers
Active Current Limiting, Supplies From 9V to 80V
ThinSOT™ Package, 2.7V to 28V
LTC1696
LTC1735
Overvoltage Protection Controller
High Efficiency Synchronous Step-Down
Switching Regulator
Output Fault Protection, 16-Pin SSOP
LTC1778
No R
™ Wide Input Range Synchronous
Up to 97% Efficiency, 4V ≤ V ≤ 36V, 0.8V ≤ V
≤ (0.9)(V ),
OUT IN
SENSE
IN
Step-Down Controller
I
Up to 20A
OUT
LTC2909
Triple/Dual Inputs UV/OV Negative Monitor
Single/Dual UV/OV Voltage Monitor
Quad UV/OV Monitor
Pin Selectable Input Polarity Allows Negative and OV Monitoring
Ads UV and OV Trip Values, 1.5% Threshold Accuracy
For Positive and Negative Supplies
LTC2912/LTC2913
LTC2914
LTC3727/LTC3727-1 2-Phase, Dual, Synchronous Controller
LTC3827/LTC3827-1 Low I , Dual, Synchronous Controller
4V ≤ V ≤ 36V, 0.8V ≤ V
≤ 14V
IN
OUT
OUT
4V ≤ V ≤ 36V, 0.8V ≤ V
≤ 10V, 80μA Quiescent Current
Q
IN
LTC3835/LTC3835-1 Low I , Synchronous Step-Down Controller
Single Channel LTC3827/LTC3827-1
4V ≤ V ≤ 60V, 1.23V ≤ V ≤ 36V, 120μA Quiescent Current
Q
LT3845
LT3850
Low I , Synchronous Step-Down Controller
Q
IN
OUT
Dual, 550kHz, 2-Phase Sychronous Step-Down
Controller
Dual 180° Phased Controllers, V 4V to 24V, 97% Duty Cycle, 4mm × 4mm
IN
QFN-28, SSOP-28 Packages
LT4256
Positive 48V Hot Swap Controller with
Open-Circuit Detect
Foldback Current Limiting, Open-Circuit and Overcurrent Fault Output, Up to
80V Supply
LTC4260
Positive High Voltage Hot Swap Controller with
Wide Operating Range 8.5V to 80V
2
ADC and I C
LTC4352
Ideal MOSFET ORing Diode
External N-channel MOSFETs Replace ORing Diodes, 0V to 18V Operation
Controls Two N-channel MOSFETs, 1μs Turn-Off, 80V Operation
Controls Two N-channel MOSFETs, 0.5μs Turn-Off, 80V Operation
LTC4354
Negative Voltage Diode-OR Controller
Positive Voltage Diode-OR Controller
LTC4355
Hot Swap, No R
and ThinSOT are trademarks of Linear Technology Corporation.
SENSE
4356fa
LT 0510 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
26
●
●
© LINEAR TECHNOLOGY CORPORATION 2009
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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